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Disambiguation of "Gupta, Navneet"

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1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell.

, , , , and . ESSCIRC, page 316-319. IEEE, (2017)

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Navneet Dalal

Navneet Kumar

Ashutosh Kumar Gupta

Rahul Gupta

Shashank Gupta

 

Other publications of authors with the same name

1.56GHz/0.9V energy-efficient reconfigurable CAM/SRAM using 6T-CMOS bitcell., , , , and . ESSCIRC, page 316-319. IEEE, (2017)16Kb hybrid TFET/CMOS reconfigurable CAM/SRAM array based on 9T-TFET bitcell., , , , and . ESSDERC, page 356-359. IEEE, (2016)A 6-Bit, 29.56 fJ/Conv-Step, Voltage Scalable Flash-SAR Hybrid ADC in 28 nm CMOS., , and . ISCAS, page 1-5. IEEE, (2019)TFET NDR skewed inverter based sensing method., , , , , and . NANOARCH, page 13-14. ACM, (2016)Sub-picowatt retention mode TFET memory for CMOS sensor processing nodes., , , , and . IWASI, page 266-270. IEEE, (2015)Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator., , , , , and . ISCAS, page 1-5. IEEE, (2019)Energy efficiency optimization for digital applications in 28nm UTBB FDSOI technology., , , , and . MIXDES, page 23. IEEE, (2015)Ultra-Low-Power compact TFET Flip-Flop design for high-performance low-voltage applications., , , , and . ISQED, page 107-112. IEEE, (2016)Tunnel FET based ultra-low-leakage compact 2T1C SRAM., , , , and . ISQED, page 71-75. IEEE, (2017)A 0.4-0.9V, 2.87pJ/cycle Near-Threshold ARM Cortex-M3 CPU with In-Situ Monitoring and Adaptive-Logic Scan., , , , , , , , , and 1 other author(s). COOL CHIPS, page 1-3. IEEE, (2020)