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Power consumption bounds for SAR ADCs., , and . ECCTD, page 556-559. IEEE, (2011)A +32 dBm 1.85 GHz class-D outphasing RF PA in 130nm CMOS for WCDMA/LTE., , and . ESSCIRC, page 127-130. IEEE, (2011)A scalable custom simulation machine for the Bayesian Confidence Propagation Neural Network model of the brain., , , , and . ASP-DAC, page 578-585. IEEE, (2014)2 GB/S decision feedback equalizer in 3.3 V 0.35 µM CMOS., and . Circuits, Signals, and Systems, page 114-119. IASTED/ACTA Press, (2004)A sensor array for phase and amplitude detection of synchronous modulated light sources., and . ISCAS, page 164-167. IEEE, (1993)Methodology of layout based schematic and its usage in efficient high performance CMOS design., and . ISCAS (6), page 254-257. IEEE, (1999)Electrical interconnects revitalized.. IEEE Trans. Very Large Scale Integr. Syst., 10 (6): 777-788 (2002)Full-custom vs. standard-cell design flow: an adder case study., , , and . ASP-DAC, page 507-510. ACM, (2003)Multiband direct RF-sampling receiver front-end for WLAN in 0.13 μm CMOS., , , and . ECCTD, page 168-171. IEEE, (2007)3-Gb/s, Single-ended Adaptive Equalization of Bidirectional Data over a Multi-drop Bus., and . SoC, page 1-4. IEEE, (2007)