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Disambiguation of "Yuan, Jiren"

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System Level Policies for Fault Tolerance Issues in the FERMI Project.

, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , and . DFT, page 1-8. IEEE Computer Society, (1993)

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Xiugan Yuan

Jing Yuan

Fang Yuan

Li Yuan

Lei Yuan

 

Other publications of authors with the same name

A direct digital RF amplitude modulator., and . ISCAS (1), page 141-144. IEEE, (2002)High-speed CMOS circuit technique., and . IEEE J. Solid State Circuits, 24 (1): 62-70 (February 1989)A non-feedback multiphase clock generator., , and . ISCAS (4), page 389-392. IEEE, (2002)Single input current-sensing differential logic (SCSDL)., and . ISCAS, page 764-767. IEEE, (2000)An 8-bit 100-MHz CMOS linear interpolation DAC., and . IEEE J. Solid State Circuits, 38 (10): 1758-1761 (2003)Ultra high speed CMOS design., and . VLSI, volume A-42 of IFIP Transactions, page 273-282. North-Holland, (1993)Realization of a floating-point A/D converter., and . ISCAS (1), page 404-407. IEEE, (2001)A 10-bit 500-MS/s 124-mW Subranging Folding ADC in 0.13 µm CMOS., and . ISCAS, page 1709-1712. IEEE, (2007)An arbitrarily skewable multiphase clock generator combining direct interpolation with phase error average., and . ISCAS (1), page 645-648. IEEE, (2003)An 8-Bit, 100-MHz low glitch interpolation DAC., and . ISCAS (4), page 116-119. IEEE, (2001)