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Energy efficient and ultra low voltage security circuits for nanoscale CMOS technologies., , , и . CICC, стр. 1-4. IEEE, (2017)Centip3De: a many-core prototype exploring 3D integration and near-threshold computing., , , , , , , , , и 5 other автор(ы). Commun. ACM, 56 (11): 97-104 (2013)A 4900- $\mu$ m2 839-Mb/s Side-Channel Attack- Resistant AES-128 in 14-nm CMOS With Heterogeneous Sboxes, Linear Masked MixColumns, and Dual-Rail Key Addition., , , , , , , , , и 2 other автор(ы). IEEE J. Solid State Circuits, 55 (4): 945-955 (2020)16.1 A 340mV-to-0.9V 20.2Tb/s source-synchronous hybrid packet/circuit-switched 16×16 network-on-chip in 22nm tri-gate CMOS., , , , , , , , , и . ISSCC, стр. 276-277. IEEE, (2014)A 1.4GHz 20.5Gbps GZIP decompression accelerator in 14nm CMOS featuring dual-path out-of-order speculative Huffman decoder and multi-write enabled register file array., , , , , , , , , и 2 other автор(ы). VLSI Circuits, стр. 238-. IEEE, (2019)XPoint cache: scaling existing bus-based coherence protocols for 2D and 3D many-core systems., , , , , , , , и . PACT, стр. 75-86. ACM, (2012)Ultra-low energy circuit building blocks for security technologies., , , и . DATE, стр. 391-394. IEEE, (2018)A 225-950mV 1.5Tbps/W Whirlpool Hashing Accelerator for Secure Automotive Platforms in 14nm CMOS., , , , , , , , и . CICC, стр. 1-4. IEEE, (2019)μRNG: A 300-950mV 323Gbps/W all-digital full-entropy true random number generator in 14nm FinFET CMOS., , , , , , , , , и 1 other автор(ы). ESSCIRC, стр. 116-119. IEEE, (2015)A 230mV-950mV 2.8Tbps/W Unified SHA256/SM3 Secure Hashing Hardware Accelerator in 14nm Tri-Gate CMOS., , , , , , , и . ESSCIRC, стр. 98-101. IEEE, (2018)