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Disambiguation of "Amarù, Luca Gaetano"

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Three-Independent-Gate Transistors: Opportunities in digital, analog and RF applications.

, , , , , , , and . LATS, page 195-200. IEEE, (2016)

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Gaetano Romano

Gaetano Cicinnati

Onesimus Buatre Amaru

Mona Amaru

Gaetano Vitale

 

Other publications of authors with the same name

LUT-Based Optimization For ASIC Design Flow., , , , , , , , and . DAC, page 871-876. IEEE, (2021)Multiple Independent Gate FETs: How many gates do we need?, , , , and . ASP-DAC, page 243-248. IEEE, (2015)Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only)., , , , and . FPGA, page 262. ACM, (2015)Logic optimization and synthesis: Trends and directions in industry., , , and . DATE, page 1303-1305. IEEE, (2017)Towards structured ASICs using polarity-tunable Si nanowire transistors., , , , , , and . DAC, page 123:1-123:4. ACM, (2013)Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET., , , , and . ISCAS, page 2127-2130. IEEE, (2013)An efficient manipulation package for Biconditional Binary Decision Diagrams., , and . DATE, page 1-6. European Design and Automation Association, (2014)Majority-based synthesis for nanotechnologies., , and . ASP-DAC, page 499-502. IEEE, (2016)Advanced system on a chip design based on controllable-polarity FETs., , , and . DATE, page 1-6. European Design and Automation Association, (2014)System-level assessment and area evaluation of Spin Wave logic circuits., , , , , , , and . NANOARCH, page 25-30. IEEE Computer Society/ACM, (2014)