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Disambiguation of "Luo, Jiong"

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Logic optimization and synthesis: Trends and directions in industry.

, , , and . DATE, page 1303-1305. IEEE, (2017)

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Estelle Jiongo

Jiong Tao

Jiong Tian

Jiong Zhou

Jiong Zhang

 

Other publications of authors with the same name

Simultaneous Dynamic Voltage Scaling of Processors and Communication Links in Real-Time Distributed Embedded Systems., , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (4): 427-437 (2007)LUT-Based Optimization For ASIC Design Flow., , , , , , , , and . DAC, page 871-876. IEEE, (2021)Improving LUT-based optimization for ASICs., , , , , , and . DAC, page 421-426. ACM, (2022)Logic optimization and synthesis: Trends and directions in industry., , , and . DATE, page 1303-1305. IEEE, (2017)Power-Conscious Joint Scheduling of Periodic Task Graphs and Aperiodic Tasks in Distributed Real-Time Embedded Systems., and . ICCAD, page 357-364. IEEE Computer Society, (2000)Integrated ESOP Refactoring for Industrial Designs., , , , , and . ICECS, page 369-372. IEEE, (2018)Power-profile Driven Variable Voltage Sealing for Heterogeneous Distributed Real-time Embedded Systems., and . VLSI Design, page 369-375. IEEE Computer Society, (2003)Register Binding Based Power Management for High-level Synthesis of Control-Flow Intensive Behaviors., , , and . ICCD, page 391-394. IEEE Computer Society, (2002)SAT-Sweeping Enhanced for Logic Synthesis., , , , , , , , and . DAC, page 1-6. IEEE, (2020)Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems., , and . ICCAD, page 30-38. IEEE Computer Society / ACM, (2003)