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Disambiguation of "Sugibayashi, Tadahiko"

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A 171k-LUT Nonvolatile FPGA using Cu Atom-Switch Technology in 28nm CMOS.

, , , , , , , , , , and . FPL, page 323-327. IEEE, (2020)

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Tadahiko Iwashima

Tadahiko Fujii

 

Other publications of authors with the same name

A 12-ns 8-Mbyte DRAM secondary cache for a 64-bit microprocessor., , , , and . IEEE J. Solid State Circuits, 35 (8): 1153-1158 (2000)Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating., , , , , , , , , and 4 other author(s). ISSCC, page 194-195. IEEE, (2013)MRAM Cell Technology for Over 500-MHz SoC., , , , , , , and . IEEE J. Solid State Circuits, 42 (4): 830-838 (2007)A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing., , , , , , , , , and 5 other author(s). ISCAS, page 1588-1591. IEEE, (2014)Nonvolatile Magnetic Flip-Flop for standby-power-free SoCs., , , and . CICC, page 355-358. IEEE, (2008)MTJ/MOS-hybrid logic-circuit design flow for nonvolatile logic-in-memory LSI., , , and . ISCAS, page 105-109. IEEE, (2013)Via-Switch FPGA: 65-nm CMOS Implementation and Evaluation., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 57 (7): 2250-2262 (2022)Complementary 5T-4MTJ nonvolatile TCAM cell circuit with phase-selective parallel writing scheme., , , , , , , and . IEICE Electron. Express, 11 (10): 20140297 (2014)Resistance ratio read (R3) architecture for a burst operated 1.5V MRAM macro., , , , and . CICC, page 399-402. IEEE, (2003)10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications., , , , , , , , , and 4 other author(s). ISSCC, page 184-185. IEEE, (2014)