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Disambiguation of "Sakamoto, Toshitsugu"

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A 171k-LUT Nonvolatile FPGA using Cu Atom-Switch Technology in 28nm CMOS.

, , , , , , , , , , and . FPL, page 323-327. IEEE, (2020)

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Keizo Sakamoto

Hideyuki Sakamoto

Peter Takaschi Sakamoto

 

Other publications of authors with the same name

0.39-V, 18.26-µW/MHz SOTB CMOS Microcontroller with embedded atom switch ROM., , , , , , , , , and 8 other author(s). COOL Chips, page 1-3. IEEE Computer Society, (2015)Sensor Signal Processing Using High-Level Synthesis With a Layered Architecture., , , , , , , , , and 4 other author(s). IEEE Embed. Syst. Lett., 10 (4): 119-122 (2018)33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al Applications., , , , , , , , , and 4 other author(s). ISSCC, page 502-504. IEEE, (2020)A nonvolatile programmable solid-electrolyte nanometer switch., , , , , , , , and . IEEE J. Solid State Circuits, 40 (1): 168-176 (2005)Sub-μW standby power, <18 μW/DMIPS@25MHz MCU with embedded atom-switch programmable logic and ROM., , , , , , , , , and . VLSIC, page 86-. IEEE, (2015)Via-Switch FPGA: 65-nm CMOS Implementation and Evaluation., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 57 (7): 2250-2262 (2022)A chip-stacked memory for on-chip SRAM-rich SoCs and processors., , , , , , , , and . ISSCC, page 60-61. IEEE, (2009)Fault Diagnosis of Via-Switch Crossbar in Non-volatile FPGA., , , and . DATE, page 983-986. IEEE, (2020)Programmable cell array using rewritable solid-electrolyte switch integrated in 90nm CMOS., , , , , , , , , and 2 other author(s). ISSCC, page 228-229. IEEE, (2011)0.5-V Highly Power-Efficient Programmable Logic using Nonvolatile Configuration Switch in BEOL., , , , , , , and . FPGA, page 236-239. ACM, (2015)