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Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited).

G. Burr, P. Narayanan, S. Ambrogio, A. Okazaki, H. Tsai, K. Hosokawa, C. Mackin, A. Nomura, T. Yasuda, J. Demarest, K. Brew, V. Chan, S. Choi, T. Gordon, T. Levin, A. Friz, M. Ishii, Y. Kohda, A. Chen, A. Fasoli, J. Luquin, N. Saulnier, S. Teehan, I. Ahsan, and V. Narayanan. VLSI Technology and Circuits, page 1-2. IEEE, (2023)

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Geoffrey Hinds

Geoffrey Coulson

Geoffrey Lund

Geoffrey Davis

Geoffrey Mwachala

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Non-volatile memory as hardware synapse in neuromorphic computing: A first look at reliability issues.R. Shelby, G. Burr, I. Boybat, and C. di Nolfo. IRPS, page 6. IEEE, (2015)Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation.R. Bruce, S. Sarwat, I. Boybat, C. Cheng, W. Kim, S. Nandakumar, C. Mackin, T. Philip, Z. Liu, K. Brew and 21 other author(s). IRPS, page 1-6. IEEE, (2021)Neuromorphic Computing with Phase Change, Device Reliability, and Variability Challenges.C. Mackin, P. Narayanan, S. Ambrogio, H. Tsai, K. Spoon, A. Fasoli, A. Chen, A. Friz, R. Shelby, and G. Burr. IRPS, page 1-10. IEEE, (2020)Holographic Data Storage.D. Psaltis, and G. Burr. Computer, 31 (2): 52-60 (1998)Reducing circuit design complexity for neuromorphic machine learning systems based on Non-Volatile Memory arrays.P. Narayanan, L. Sanches, A. Fumarola, R. Shelby, S. Ambrogio, J. Jang, H. Hwang, Y. Leblebici, and G. Burr. ISCAS, page 1-4. IEEE, (2017)Toward Software-Equivalent Accuracy on Transformer-Based Deep Neural Networks With Analog Memory Devices.K. Spoon, H. Tsai, A. Chen, M. Rasch, S. Ambrogio, C. Mackin, A. Fasoli, A. Friz, P. Narayanan, M. Stanisavljevic and 1 other author(s). Frontiers Comput. Neurosci., (2021)Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited).G. Burr, P. Narayanan, S. Ambrogio, A. Okazaki, H. Tsai, K. Hosokawa, C. Mackin, A. Nomura, T. Yasuda, J. Demarest and 15 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Impact of Phase-Change Memory Drift on Energy Efficiency and Accuracy of Analog Compute-in-Memory Deep Learning Inference (Invited).M. Frank, N. Li, M. Rasch, S. Jain, C. Chen, R. Muralidhar, J. Han, V. Narayanan, T. Philip, K. Brew and 11 other author(s). IRPS, page 1-10. IEEE, (2023)Circuit Techniques for Efficient Acceleration of Deep Neural Network Inference with Analog-AI (Invited).K. Hosokawa, P. Narayanan, S. Ambrogio, H. Tsai, C. Mackin, A. Fasoli, A. Friz, A. Chen, J. Luquin, K. Spoon and 2 other author(s). ISCAS, page 1-5. IEEE, (2021)Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers.A. Okazaki, P. Narayanan, S. Ambrogio, K. Hosokawa, H. Tsai, A. Nomura, T. Yasuda, C. Mackin, A. Friz, M. Ishii and 6 other author(s). ISCAS, page 3319-3323. IEEE, (2022)

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Disambiguation of "Burr, Geoffrey W."

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Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited).

Please choose a person to relate this publication to

Geoffrey Hinds

Geoffrey Coulson

Geoffrey Lund

Geoffrey Davis

Geoffrey Mwachala

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Burr, Geoffrey W."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited).

Please choose a person to relate this publication to

Geoffrey Hinds

Geoffrey Coulson

Geoffrey Lund

Geoffrey Davis

Geoffrey Mwachala

Other publications of authors with the same name

Disambiguation

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Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited).