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Improving approximate-TMR using multi-objective optimization genetic algorithm., , , , , , and . LATS, page 1-6. IEEE, (2018)Synthesis of threshold logic gates to nanoelectronics., , , and . SBCCI, page 1-6. IEEE, (2013)Logic IP for Low-Cost IC Design in Advanced CMOS Nodes., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (2): 585-595 (2020)From Virtual Characterization to Test-Chips: DFM Analysis Through Pattern Enumeration., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (2): 520-532 (2020)Efficient method to compute minimum decision chains of Boolean functions., , , and . ACM Great Lakes Symposium on VLSI, page 419-422. ACM, (2011)Read-polarity-once Boolean functions., , , and . SBCCI, page 1-6. IEEE, (2013)Virtual characterization for exhaustive DFM evaluation of logic cell libraries., , and . ISQED, page 93-98. IEEE, (2017)A Simple and Effective Heuristic Method for Threshold Logic Identification., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (5): 1023-1036 (2018)Semi-custom NCL Design with Commercial EDA Frameworks: Is it Possible?, , , , , and . ASYNC, page 53-60. IEEE Computer Society, (2014)Functional composition: A new paradigm for performing logic synthesis., , and . ISQED, page 236-242. IEEE, (2012)