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Disambiguation of "Martins, Mayler G. A."

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Spin diode network synthesis using functional composition.

, , , , , and . SBCCI, page 1-6. IEEE, (2013)

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A G Class

C A G Charpentier

Robert G A Kurvers

G Charles A Fernando

Robert G A Lotz

 

Other publications of authors with the same name

Improving approximate-TMR using multi-objective optimization genetic algorithm., , , , , , and . LATS, page 1-6. IEEE, (2018)From Virtual Characterization to Test-Chips: DFM Analysis Through Pattern Enumeration., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (2): 520-532 (2020)Logic IP for Low-Cost IC Design in Advanced CMOS Nodes., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (2): 585-595 (2020)Synthesis of threshold logic gates to nanoelectronics., , , and . SBCCI, page 1-6. IEEE, (2013)Efficient method to compute minimum decision chains of Boolean functions., , , and . ACM Great Lakes Symposium on VLSI, page 419-422. ACM, (2011)Read-polarity-once Boolean functions., , , and . SBCCI, page 1-6. IEEE, (2013)Virtual characterization for exhaustive DFM evaluation of logic cell libraries., , and . ISQED, page 93-98. IEEE, (2017)A Simple and Effective Heuristic Method for Threshold Logic Identification., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (5): 1023-1036 (2018)Methodology for achieving best trade-off of area and fault masking coverage in ATMR., , , , , and . LATW, page 1-6. IEEE, (2014)Improved logic synthesis for memristive stateful logic using multi-memristor implication., , , , and . ISCAS, page 181-184. IEEE, (2015)