Author of the publication

A Simple and Effective Heuristic Method for Threshold Logic Identification.

, , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (5): 1023-1036 (2018)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

SwitchCraft: a framework for transistor network design., , , , , and . SBCCI, page 49-53. ACM, (2010)Graph-Based Transistor Network Generation Method for Supergate Design., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (2): 692-705 (2016)Area impact analysis of via-configurable regular fabric for digital integrated circuit design., , , , , and . SBCCI, page 103-108. ACM, (2011)Improving the methodology to build non-series-parallel transistor arrangements., , , , , and . SBCCI, page 1-6. IEEE, (2013)Transistor-level optimization of CMOS complex gates., , , , , and . LASCAS, page 1-4. IEEE, (2013)Efficient method to compute minimum decision chains of Boolean functions., , , and . ACM Great Lakes Symposium on VLSI, page 419-422. ACM, (2011)Read-polarity-once Boolean functions., , , and . SBCCI, page 1-6. IEEE, (2013)SOP based logic synthesis for memristive IMPLY stateful logic., , , and . ICCD, page 228-235. IEEE Computer Society, (2015)A Simple and Effective Heuristic Method for Threshold Logic Identification., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (5): 1023-1036 (2018)Improved logic synthesis for memristive stateful logic using multi-memristor implication., , , , and . ISCAS, page 181-184. IEEE, (2015)