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Low-power neuromorphic speech recognition engine with coarse-grain sparsity., , , , , , and . ASP-DAC, page 111-114. IEEE, (2017)Recent progresses of STT memory design and applications., , , , , and . ASICON, page 1-4. IEEE, (2015)Heterogeneous Memory Architecture Accommodating Processing-in-Memory on SoC for AIoT Applications., , , and . ASP-DAC, page 383-388. IEEE, (2022)ReTransformer: ReRAM-based Processing-in-Memory Architecture for Transformer Acceleration., , , and . ICCAD, page 92:1-92:9. IEEE, (2020)A neuromorphic design using chaotic mott memristor with relaxation oscillation., , and . DAC, page 167:1-167:6. ACM, (2018)Highly Efficient Neuromorphic Computing Systems With Emerging Nonvolatile Memories.. Duke University, Durham, NC, USA, (2020)base-search.net (ftdukeunivdsp:oai:localhost:10161/21451).Hardware Fault Tolerance for Binary RRAM Crossbars., , , and . ITC, page 1-10. IEEE, (2019)Spin-Hall Assisted STT-RAM Design and Discussion., , , , , , and . SLIP, page 7:1-7:4. ACM, (2016)Live Demonstration: SRAM Compute-In-Memory Based Visual & Aural Recognition System., , , , , , , , and . AICAS, page 1-2. IEEE, (2023)A High-Speed Robust NVM-TCAM Design Using Body Bias Feedback., , , , , , and . ACM Great Lakes Symposium on VLSI, page 69-74. ACM, (2015)