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Faithfully Truncated Adder-Based Area-Power Efficient FIR Design with Predefined Output Accuracy.

, , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 103-A (9): 1063-1070 (2020)

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Floorplan-driven high-level synthesis using volatile/non-volatile registers for hybrid energy-harvesting systems., , and . ASICON, page 64-67. IEEE, (2017)Energy-efficient high-level synthesis for HDR architectures with clock gating., , and . ISOCC, page 135-138. IEEE, (2012)Pedestrian navigation based on landmark recognition using glass-type wearable devices., , , , and . GCCE, page 1-2. IEEE, (2016)A safe and comprehensive route finding method for pedestrian based on lighting and landmark., , , , and . GCCE, page 1-5. IEEE, (2016)A visible corner-landmark based route finding algorithm for pedestrian navigation., , , , and . GCCE, page 601-602. IEEE, (2015)A floorplan-driven high-level synthesis algorithm with multiple-operation chainings based on path enumeration., , and . ISCAS, page 2129-2132. IEEE, (2015)Scan-based attack against Trivium stream cipher independent of scan structure., , and . ASICON, page 1-4. IEEE, (2013)A process-variation-aware multi-scenario high-level synthesis algorithm for distributed-register architectures., , , and . SoCC, page 7-12. IEEE, (2015)State dependent scan flip-flop with key-based configuration against scan-based side channel attack on RSA circuit., , , and . APCCAS, page 607-610. IEEE, (2012)A delay variation and floorplan aware high-level synthesis algorithm with body biasing., , , and . ISQED, page 75-80. IEEE, (2016)