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Disambiguation of "Lemaire, Romain"

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Proposition of a benchmark for evaluation of cores mapping onto NoC architectures.

, , , and . ReCoSoC, page 93-98. Univ. Montpellier II, (2005)

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François Lemaire

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Bernhard Lemaire

Norbert Lemaire

Rainer Lemaire

 

Other publications of authors with the same name

MCAPI-compliant Hardware Buffer Manager mechanism to support communication in multi-core architectures., , , and . DATE, page 1006-1011. IEEE, (2016)HW-SW integration for energy-efficient/variability-aware computing., , , , and . DATE, page 607-611. EDA Consortium San Jose, CA, USA / ACM DL, (2013)SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration., , , , , , , , , and 10 other author(s). IEEE J. Solid State Circuits, 58 (6): 1782-1797 (2023)On Class-Incremental Learning for Fully Binarized Convolutional Neural Networks., , , , and . ISCAS, page 1-5. IEEE, (2024)Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors., , , , , , , , , and 5 other author(s). DATE, page 136-141. IEEE, (2021)Automatic Runtime Customization for Variability Awareness on Multicore Platforms., , and . MCSoC, page 143-150. IEEE Computer Society, (2015)An Open and Reconfigurable Platform for 4G Telecommunication: Concepts and Application., , , , and . DSD, page 449-456. IEEE Computer Society, (2009)SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency., , , , , , , , , and 11 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)A Communication and configuration controller for NoC based reconfigurable data flow architecture., , , and . NOCS, page 153-162. IEEE Computer Society, (2009)M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC., , , , , , and . DATE, page 1740-1745. IEEE, (2020)