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Другие публикации лиц с тем же именем

Hardware architecture for global motion estimation for MPEG-4 Advanced Simple Profile., , , , и . ISCAS (2), стр. 301-304. IEEE, (2004)Analysis and hardware architecture for global motion estimation in MPEG-4 Advanced Simple Profile., , , , и . ISCAS (2), стр. 720-723. IEEE, (2003)On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform., , , , и . IEEE Trans. Circuits Syst. Video Techn., 17 (7): 814-822 (2007)System Analysis of VLSI Architecture for 5/3 and 1/3 Motion-Compensated Temporal Filtering., , , , и . IEEE Trans. Signal Process., 54 (10): 4004-4014 (2006)Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering video coding applications., , , и . ICASSP (5), стр. 93-96. IEEE, (2005)Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME., , , и . ICME, стр. 365-368. IEEE Computer Society, (2006)Multiple sprites and frame skipping techniques for sprite generation with high subjective quality and fast speed., , , и . ICME (1), стр. 785-788. IEEE Computer Society, (2002)Unsupervised object-based sprite coding system for tennis sport., , , , и . ICME, стр. 337-340. IEEE Computer Society, (2003)Sample Adaptive Offset in the HEVC Standard., , , , , , , , , и . IEEE Trans. Circuits Syst. Video Technol., 22 (12): 1755-1764 (2012)Motion compensated de-interlacing with adaptive global motion estimation and compensation., , , и . ICIP (3), стр. 693-696. IEEE, (2003)