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Analysis and evaluation of harmonic distortion in the tunnel diode oscillator., , and . ISCAS, IEEE, (2006)CMOS single-to-differential current amplifier., , and . ISCAS (3), page 2583-2586. IEEE, (2005)Constant and maximum bandwidth feedback amplifier with adaptive frequency compensation., , and . ISCAS, page 436-439. IEEE, (2012)Current output stage with improved CMRR., , and . ICECS, page 543-546. IEEE, (2003)A toolbox for the symbolic analysis and simulation of linear analog circuits., , and . SMACD, page 1-4. IEEE, (2017)Active load with cross-coupled bulk for high-gain high-CMRR nanometer CMOS differential stages., , and . I. J. Circuit Theory and Applications, 47 (10): 1700-1704 (2019)High-speed CMOS unity-gain current amplifier., , and . Microelectron. J., 37 (10): 1086-1091 (2006)A 2.5-GHz DDFS-PLL With 1.8-MHz Bandwidth in 0.35-µm CMOS., , , , , and . IEEE J. Solid State Circuits, 43 (6): 1403-1413 (2008)Advances in Reversed Nested Miller Compensation., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (7): 1459-1470 (2007)A 0.3-V 8.5-μ a Bulk-Driven OTA., , , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (9): 1444-1448 (September 2023)