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Disambiguation of "Menichelli, Francesco"

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Contextual Bandits Algorithms for Reconfigurable Hardware Accelerators.

, , , , , , and . ApplePies, volume 1036 of Lecture Notes in Electrical Engineering, page 149-154. Springer, (2022)

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Francesco Bettella

Protein secondary structure prediction using optimized scoring functions: a comparative statistical method. FU Berlin, (2009)

Francesco Knechtli

Francesco Virili

Francesco Vetere

Francesco Bagorda

 

Other publications of authors with the same name

The Microarchitecture of a Multi-threaded RISC-V Compliant Processing Core Family for IoT End-Nodes., , , , and . ApplePies, volume 512 of Lecture Notes in Electrical Engineering, page 89-97. Springer, (2017)Contextual Bandits Algorithms for Reconfigurable Hardware Accelerators., , , , , , and . ApplePies, volume 1036 of Lecture Notes in Electrical Engineering, page 149-154. Springer, (2022)Dynamic Triple Modular Redundancy in Interleaved Hardware Threads: An Alternative Solution to Lockstep Multi-Cores for Fault-Tolerant Systems., , , , , and . IEEE Access, (2024)A RISC-V Fault-Tolerant Soft-Processor Based on Full/Partial Heterogeneous Dual-Core Protection., , , , , and . IEEE Access, (2024)Scalable virtual prototyping of distributed embedded control in a modern elevator system., , , , , , and . SIES, page 267-270. IEEE, (2012)Side channel analysis resistant design flow., , , , , , , and . ISCAS, IEEE, (2006)Performance evaluation of Jpeg2000 implementation on VLIW cores, SIMD cores and multi-cores., , and . ISCAS, page 1483-1486. IEEE, (2011)Efficient Machine Learning Algorithm for Embedded Tactile Data Processing., , , , and . ISCAS, page 1-5. IEEE, (2021)A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design., , , , , and . DFT, page 1-4. IEEE, (2021)AeneasHDC: An Automatic Framework for Deploying Hyperdimensional Computing Models on FPGAs., , , , , , , and . IJCNN, page 1-8. IEEE, (2024)