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Tackling memory access latency through DRAM row management., , , , and . MEMSYS, page 137-147. ACM, (2018)Merge Network for a Non-Von Neumann Accumulate Accelerator in a 3D Chip., , , and . ICRC, page 1-11. IEEE, (2018)Superstrider associative array architecture: Approved for unlimited unclassified release: SAND2017-7089 C., , , and . HPEC, page 1-7. IEEE, (2017)SlimSLAM: An Adaptive Runtime for Visual-Inertial Simultaneous Localization and Mapping., , , , , and . ASPLOS (3), page 900-915. ACM, (2024)Computationally-redundant energy-efficient processing for y'all (CREEPY)., , , , , , and . ICRC, page 1-8. IEEE Computer Society, (2016)Energy efficiency limits of logic and memory., , , , , , , , , and . ICRC, page 1-8. IEEE Computer Society, (2016)Experimental Insights from the Rogues Gallery., , , , , and . ICRC, page 80-87. IEEE, (2019)The Superstrider Architecture: Integrating Logic and Memory Towards Non-Von Neumann Computing., , , and . ICRC, page 1-8. IEEE, (2017)Energy efficient architectures for irregular data streams.. Georgia Institute of Technology, Atlanta, GA, USA, (2020)base-search.net (ftgeorgiatech:oai:smartech.gatech.edu:1853/62757).Intrepydd: performance, productivity, and portability for data science application kernels., , , , , , and . Onward!, page 65-83. ACM, (2020)