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MobiLattice: A Depth-wise DCNN Accelerator with Hybrid Digital/Analog Nonvolatile Processing-In-Memory Block.

Q. Zheng, X. Li, Z. Wang, G. Sun, Y. Cai, R. Huang, Y. Chen, and H. Li. ICCAD, page 104:1-104:9. IEEE, (2020)

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Yiran Wang

Chen Chen

Shih Chen Chen

Yi-Chen Chen

Other publications of authors with the same name

Preplacement Net Length and Timing Estimation by Customized Graph Neural Network.Z. Xie, R. Liang, X. Xu, J. Hu, C. Chang, J. Pan, and Y. Chen. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (11): 4667-4680 (2022)Analog, In-memory Compute Architectures for Artificial Intelligence.P. Bowen, G. Regev, N. Regev, B. Pedroni, E. Hanson, and Y. Chen. CoRR, (2023)A Novel Architecture Design for Output Significance Aligned Flow with Adaptive Control in ReRAM-based Neural Network Accelerator.T. Li, N. Jing, J. Jiang, Q. Wang, Z. Mao, and Y. Chen. ACM Trans. Design Autom. Electr. Syst., 27 (6): 57:1-57:22 (2022)Nonvolatile Memories as the Data Storage System for Implantable ECG Recorder.Z. Sun, X. Chen, Y. Zhang, H. Li, and Y. Chen. ACM J. Emerg. Technol. Comput. Syst., 8 (2): 13:1-13:16 (2012)Fine-grained Out-of-Distribution Detection with Mixup Outlier Exposure.J. Zhang, N. Inkawhich, Y. Chen, and H. Li. CoRR, (2021)FADE: Enabling Large-Scale Federated Adversarial Training on Resource-Constrained Edge Devices.M. Tang, J. Zhang, M. Ma, L. DiValentin, A. Ding, A. Hassanzadeh, H. Li, and Y. Chen. CoRR, (2022)Low-Cost Floating-Point Processing in ReRAM for Scientific Computing.L. Song, F. Chen, X. Qian, H. Li, and Y. Chen. CoRR, (2020)Fast IR Drop Estimation with Machine Learning.Z. Xie, H. Li, X. Xu, J. Hu, and Y. Chen. CoRR, (2020)Introduction to the Special Issue on User-Centric Security and Safety for CPS.N. Saxena, A. Cárdenas, R. Beyah, R. Lu, K. Choo, and Y. Chen. ACM Trans. Cyber Phys. Syst., 4 (3): 29:1-29:2 (2020)Communication-Efficient Vertical Federated Learning with Limited Overlapping Samples.J. Sun, Z. Xu, D. Yang, V. Nath, W. Li, C. Zhao, D. Xu, Y. Chen, and H. Roth. ICCV, page 5180-5189. IEEE, (2023)

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Disambiguation of "Chen, Yiran"

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MobiLattice: A Depth-wise DCNN Accelerator with Hybrid Digital/Analog Nonvolatile Processing-In-Memory Block.

Please choose a person to relate this publication to

Yiran Wang

Chen Chen

Chen Chen

Shih Chen Chen

Yi-Chen Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chen, Yiran"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML MobiLattice: A Depth-wise DCNN Accelerator with Hybrid Digital/Analog Nonvolatile Processing-In-Memory Block.

Please choose a person to relate this publication to

Yiran Wang

Chen Chen

Chen Chen

Shih Chen Chen

Yi-Chen Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MobiLattice: A Depth-wise DCNN Accelerator with Hybrid Digital/Analog Nonvolatile Processing-In-Memory Block.