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SiDA: Sparsity-Inspired Data-Aware Serving for Efficient and Scalable Large Mixture-of-Experts Models., , , , , , , , , и . CoRR, (2023)Accelerating Sparse Attention with a Reconfigurable Non-volatile Processing-In-Memory Architecture., , , , , и . DAC, стр. 1-6. IEEE, (2023)Lattice: An ADC/DAC-less ReRAM-based Processing-In-Memory Architecture for Accelerating Deep Convolution Neural Networks., , , , , , , , и . DAC, стр. 1-6. IEEE, (2020)MobiLattice: A Depth-wise DCNN Accelerator with Hybrid Digital/Analog Nonvolatile Processing-In-Memory Block., , , , , , , и . ICCAD, стр. 104:1-104:9. IEEE, (2020)Quantum algorithm and experimental demonstration for the subset sum problem., , , , , , , , , и 1 other автор(ы). Sci. China Inf. Sci., 65 (8): 1-14 (2022)EMS-i: An Efficient Memory System Design with Specialized Caching Mechanism for Recommendation Inference., , , , , и . ACM Trans. Embed. Comput. Syst., 22 (5s): 100:1-100:22 (октября 2023)Improving the Robustness and Efficiency of PIM-Based Architecture by SW/HW Co-Design., , , и . ASP-DAC, стр. 618-623. ACM, (2023)Block-Wise Mixed-Precision Quantization: Enabling High Efficiency for Practical ReRAM-based DNN Accelerators., , , , , , , , , и 2 other автор(ы). CoRR, (2023)Hiearchical Crossbar Design for ReRAM based Write Variation Inhibition on-chip learning., , , , , и . NVMTS, стр. 1-3. IEEE, (2018)Processing-in-Memory Technology for Machine Learning: From Basic to ASIC., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 69 (6): 2598-2603 (2022)