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Другие публикации лиц с тем же именем

Performance optimization of multiple memory architectures for DSP., , и . ISCAS (5), стр. 469-472. IEEE, (2002)An Integrated Framework of Design Optimization and Space Minimization for DSP applications., , и . ISCAS (5), стр. 601-604. IEEE, (2003)Management and optimization for nonvolatile memory-based hybrid scratchpad memory on multicore embedded processors., , , , и . ACM Trans. Embed. Comput. Syst., 13 (4): 79:1-79:25 (2014)An Empirical Study of NVM-based File System., , , , , и . NVMSA, стр. 1-6. IEEE, (2021)Hardware/Software Co-Exploration of Neural Architectures., , , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (12): 4805-4815 (2020)Contour: A Process Variation Aware Wear-Leveling Mechanism for Inodes of Persistent Memory File Systems., , , , , и . IEEE Trans. Computers, 70 (7): 1034-1045 (2021)Optimal scheduling to minimize non-volatile memory access time with hardware cache., , , , и . VLSI-SoC, стр. 131-136. IEEE, (2010)Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs., , , , , и . EUC, том 3824 из Lecture Notes in Computer Science, стр. 121-130. Springer, (2005)Efficent Algorithm of Energy Minimization for Heterogeneous Wireless Sensor Network., , , , , и . EUC, том 4096 из Lecture Notes in Computer Science, стр. 25-34. Springer, (2006)Architectural Exploration on Racetrack Memories., , , , и . SoCC, стр. 31-36. IEEE, (2020)