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Linearity guidelines for gm-C biquad filter design using architecture optimization with Volterra analysis.

P. Crombez, J. Craninckx, P. Wambacq, and M. Steyaert. ECCTD, page 216-219. IEEE, (2007)

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Piet Jonas

Piet Engelke

Piet Hensel

Piet Meerendonk

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Modeling FinFET metal gate stack resistance for 14nm node and beyond.K. Miyaguchi, B. Parvais, L. Ragnarsson, P. Wambacq, P. Raghavan, A. Mercha, A. Mocuta, D. Verkest, and A. Thean. ICICDT, page 1-4. IEEE, (2015)A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS.J. Borremans, P. Wambacq, M. Kuijk, G. Carchon, and S. Decoutere. ISSCC, page 536-537. IEEE, (2008)Flicker noise upconversion mechanisms in K-band CMOS VCOs.Q. Shi, D. Guermandi, J. Craninckx, and P. Wambacq. A-SSCC, page 1-4. IEEE, (2015)An up to 36Gbps analog baseband equalizer and demodulator for mm-wave wireless communication in 28nm CMOS.O. Mattia, D. Guermandi, G. Torfs, and P. Wambacq. CICC, page 1-4. IEEE, (2017)Inductor-based ESD protection under CDM-like ESD stress conditions for RF applications.S. Thijs, M. Okushima, J. Borremans, P. Jansen, D. Linten, M. Scholz, P. Wambacq, and G. Groeseneken. CICC, page 49-52. IEEE, (2008)A CMOS IQ direct digital RF modulator with embedded RF FIR-based quantization noise filter.W. Gaber, P. Wambacq, J. Craninckx, and M. Ingels. ESSCIRC, page 139-142. IEEE, (2011)A 54-64.8 GHz subharmonically injection-locked frequency synthesizer with transmitter EVM between -26.5 dB and -28.8 dB in 28 nm CMOS.C. Tsai, G. Mangraviti, Q. Shi, K. Khalaf, A. Bourdoux, and P. Wambacq. ESSCIRC, page 243-246. IEEE, (2017)A 79GHz variable gain low-noise amplifier and power amplifier in 28nm CMOS operating up to 125°C.A. Medra, V. Giannini, D. Guermandi, and P. Wambacq. ESSCIRC, page 183-186. IEEE, (2014)A 6.2mW 7b 3.5GS/s time interleaved 2-stage pipelined ADC in 40nm CMOS.A. Spagnolo, B. Verbruggen, S. D'Amico, and P. Wambacq. ESSCIRC, page 75-78. IEEE, (2014)Digital ground bounce reduction by supply current shaping and clock frequency Modulation.M. Badaroglu, P. Wambacq, G. der Plas, S. Donnay, G. Gielen, and H. Man. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (1): 65-76 (2005)

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Disambiguation of "Wambacq, Piet"

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Linearity guidelines for gm-C biquad filter design using architecture optimization with Volterra analysis.

Please choose a person to relate this publication to

Piet Jonas

Piet Engelke

Piet Hensel

Piet Hensel

Piet Meerendonk

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wambacq, Piet"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Linearity guidelines for gm-C biquad filter design using architecture optimization with Volterra analysis.

Please choose a person to relate this publication to

Piet Jonas

Piet Engelke

Piet Hensel

Piet Hensel

Piet Meerendonk

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
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Linearity guidelines for gm-C biquad filter design using architecture optimization with Volterra analysis.