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Guest Editorial Special Issue on Selected Papers From ISCAS 2021.

, , and . IEEE Trans. Biomed. Circuits Syst., 15 (6): 1126-1128 (2021)

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Impacts of NBTI/PBTI on SRAM VMIN and design techniques for SRAM VMIN improvement., and . ISOCC, page 163-166. IEEE, (2011)Read Bitline Sensing and Fast Local Write-Back Techniques in Hierarchical Bitline Architecture for Ultralow-Voltage SRAMs., , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (6): 2165-2173 (2016)A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI., , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (10): 1707-1719 (2021)A Robust Time-Based Multi-Level Sensing Circuit for Resistive Memory., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (1): 340-352 (January 2023)Guest Editorial Special Issue on Selected Papers From ISCAS 2021., , and . IEEE Trans. Biomed. Circuits Syst., 15 (6): 1126-1128 (2021)A Reconfigurable 4T2R ReRAM Computing In-Memory Macro for Efficient Edge Applications., , , and . IEEE Open J. Circuits Syst., (2021)A 0.4 V 12T 2RW dual-port SRAM with suppressed common-row-access disturbance., , and . Microelectron. J., (2017)An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing., , , , , , , , , and 4 other author(s). IEEE Trans. Circuits Syst. II Express Briefs, 62-II (12): 1149-1153 (2015)Energy-Efficient Data-Aware SRAM Design Utilizing Column-Based Data Encoding., , and . IEEE Trans. Circuits Syst. II Express Briefs, 67-II (10): 2154-2158 (2020)An On-Chip NBTI Sensor for Measuring pMOS Threshold Voltage Degradation., , and . IEEE Trans. Very Large Scale Integr. Syst., 18 (6): 947-956 (2010)