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A 17-95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm., , , , , , , и . VLSI Technology and Circuits, стр. 16-17. IEEE, (2022)STAxCache: An approximate, energy efficient STT-MRAM cache., , , , , и . DATE, стр. 356-361. IEEE, (2017)Reading spin-torque memory with spin-torque sensors., , , , и . NANOARCH, стр. 40-41. IEEE Computer Society, (2013)A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology., , , , , , , , , и 7 other автор(ы). Hot Chips Symposium, стр. 1-24. IEEE, (2019)VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference., , , , , и . MLSys, mlsys.org, (2021)Low-Precision Training in Logarithmic Number System using Multiplicative Weight Update., , , , , , и . CoRR, (2021)Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training., , , , , и . ICML, том 162 из Proceedings of Machine Learning Research, стр. 19123-19138. PMLR, (2022)VESPA: Variability emulation for System-on-Chip performance analysis., , , и . DATE, стр. 2-7. IEEE, (2011)DWM-TAPESTRI - an energy efficient all-spin cache using domain wall shift based writes., , , и . DATE, стр. 1825-1830. EDA Consortium San Jose, CA, USA / ACM DL, (2013)SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing., , , , и . ISLPED, стр. 15-20. ACM, (2014)