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Verification and Validation of Complex Digital Systems: An Industrial Perspective., and . ISQED, page 11-12. IEEE Computer Society, (2001)Guest Editors' Introduction: Emerging Challenges and Solutions in SoC Verification., , , and . IEEE Des. Test, 34 (5): 5-6 (2017)Efficient Algorithmic Circuit Verification Using Indexed BDDs., , , , and . FTCS, page 266-275. IEEE Computer Society, (1994)Design rewiring based on diagnosis techniques., , and . ASP-DAC, page 479-484. ACM, (2001)A quick and inexpensive method to identify false critical paths using ATPG techniques: an experiment with a PowerPCTM microprocessor., , and . CICC, page 71-74. IEEE, (2000)ATPG Driven Logic Synthesis for Delay and Power Minimization., , and . LATW, page 96-99. IEEE, (2001)Design Optimization Based on Diagnosis Techniques., , and . LATW, page 244-249. IEEE, (2000)LEAF: A System Level Leakage-Aware Floorplanner for SoCs., , , , and . ASP-DAC, page 274-279. IEEE Computer Society, (2007)On Testing High-Performance Custom Circuits without Explicit Testing of the Internal Faults., , and . ITC, page 398-406. IEEE Computer Society, (2002)Minimizing outlier delay test cost in the presence of systematic variability., , , and . ITC, page 1-10. IEEE Computer Society, (2009)