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Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only)., , , , и . FPGA, стр. 262. ACM, (2015)Multiple Independent Gate FETs: How many gates do we need?, , , , и . ASP-DAC, стр. 243-248. IEEE, (2015)LUT-Based Optimization For ASIC Design Flow., , , , , , , , и . DAC, стр. 871-876. IEEE, (2021)Logic optimization and synthesis: Trends and directions in industry., , , и . DATE, стр. 1303-1305. IEEE, (2017)An efficient manipulation package for Biconditional Binary Decision Diagrams., , и . DATE, стр. 1-6. European Design and Automation Association, (2014)Towards structured ASICs using polarity-tunable Si nanowire transistors., , , , , , и . DAC, стр. 123:1-123:4. ACM, (2013)Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET., , , , и . ISCAS, стр. 2127-2130. IEEE, (2013)Majority-based synthesis for nanotechnologies., , и . ASP-DAC, стр. 499-502. IEEE, (2016)Advanced system on a chip design based on controllable-polarity FETs., , , и . DATE, стр. 1-6. European Design and Automation Association, (2014)System-level assessment and area evaluation of Spin Wave logic circuits., , , , , , , и . NANOARCH, стр. 25-30. IEEE Computer Society/ACM, (2014)