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Disambiguation of "Debacker, Peter"

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Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays.

, , , , , , , , and . IMW, page 1-4. IEEE, (2023)

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Tanja Elisabeth Peters

George Gershwins und Jerome Kerns Musicalsongs: ihre Ähnlichkeit, Wahrnehmung und musikalische Struktur. Uni Köln, (2008)

Andre Peters

Description and determination of soil hydraulic properties on the laboratory scale. TU Braunschweig, (2008)

Jillian Petersen

Diversity and ecology of chemosynthetic symbioses in deep-sea invertebrates. Uni Bremen, (2009)

Robert Martin Peterreins

Musikhörfähigkeit von Patienten mit elektroakustischer Stimulation: Testung anhand des Mu.S.I.C.-Tests. TU München, (2009)

Georg Peter

 

Other publications of authors with the same name

Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays., , , , , , , , and . IMW, page 1-4. IEEE, (2023)Noise tolerant ternary weight deep neural networks for analog in-memory inference., , , , , , , and . IJCNN, page 1-8. IEEE, (2021)Learn to Learn on Chip: Hardware-aware Meta-learning for Quantized Few-shot Learning at the Edge., , , , , and . SEC, page 14-25. IEEE, (2022)Patterning Aware Design Optimization of Selective Etching in N5 and Beyond., , , , , and . ICCD, page 415-418. IEEE Computer Society, (2017)Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis., , , , and . IISWC, page 226-228. IEEE, (2023)Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing., , , , , and . NEWCAS, page 1-4. IEEE, (2021)A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm2 in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration., , , , , , , and . CICC, page 1-2. IEEE, (2021)DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC., , , , , , , , , and 6 other author(s). ISSCC, page 1-3. IEEE, (2022)Vertical M1 Routing-Aware Detailed Placement for Congestion and Wirelength Reduction in Sub-10nm Nodes., , , , , and . DAC, page 51:1-51:6. ACM, (2017)A Comparative Analysis on the Impact of Bank Contention in STT-MRAM and SRAM Based LLCs., , , , , , , , , and . ICCD, page 255-263. IEEE, (2019)