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Disambiguation of "Kar, Gouri Sankar"

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A Comparative Analysis on the Impact of Bank Contention in STT-MRAM and SRAM Based LLCs.

, , , , , , , , , and . ICCD, page 255-263. IEEE, (2019)

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Svetlana Gourianova

Hari Sankar

Subramaniam Sankar

Catherine Gouriou

Nicolas Gourier

 

Other publications of authors with the same name

Variation-Aware Physics-Based Electromigration Modeling and Experimental Calibration for VLSI Interconnects., , , , , , , and . IRPS, page 1-6. IEEE, (2019)Exploring Pareto-Optimal Hybrid Main Memory Configurations Using Different Emerging Memories., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (2): 733-746 (February 2023)Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAMs., , , , , and . IEEE Trans. Computers, 71 (9): 2219-2233 (2022)Challenges and targets of MRAM-enabled scaled spintronic logic circuits., , , , , , , , , and 1 other author(s). CoRR, (2022)The Promise of 2-D Materials for Scaled Digital and Analog Applications., , , , , , , , , and 2 other author(s). ISSCC, page 394-395. IEEE, (2023)Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM., , , , , , , , , and 7 other author(s). VLSI Circuits, page 194-. IEEE, (2019)Doped GeSe materials for selector applications., , , , , , , , , and 1 other author(s). ESSDERC, page 168-171. IEEE, (2017)Enhanced performance and low-power capability of SiGeAsSe-GeSbTe 1S1R phase-change memory operated in bipolar mode., , , , , , , , , and 3 other author(s). VLSI Technology and Circuits, page 312-313. IEEE, (2022)Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories., , , , , , , , , and . VLSI Technology and Circuits, page 375-376. IEEE, (2022)Device-Aware Test for Back-Hopping Defects in STT-MRAMs., , , , , , , , and . DATE, page 1-6. IEEE, (2023)