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Disambiguation of "Chen, Gregory K."

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25.7 Time-Borrowing Fast Mux-D Scan Flip-Flop with On-Chip Timing/Power/VMIN Characterization Circuits in 10nm CMOS.

, , , , , , , , , , , , , and . ISSCC, page 392-394. IEEE, (2020)

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Chen Chen

Chen Chen

Robert Gregory

Isa Gregory

Gregory Kroon

 

Other publications of authors with the same name

Circuit design advances to enable ubiquitous sensing environments., , , , , , and . ISCAS, page 285-288. IEEE, (2010)A dense 45nm half-differential SRAM with lower minimum operating voltage., , , , and . ISCAS, page 57-60. IEEE, (2011)Analysis and measurement of the stability of dual-resonator oscillators., , , and . RWS, page 219-222. IEEE, (2012)Centip3De: A 64-core, 3D stacked, near-threshold system., , , , , , , , , and 5 other author(s). Hot Chips Symposium, page 1-30. IEEE, (2012)A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS., , , , and . VLSI Circuits, page 255-256. IEEE, (2018)A highly resilient routing algorithm for fault-tolerant NoCs., , , , , and . DATE, page 21-26. IEEE, (2009)Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs., , , , , , , , , and 6 other author(s). FCCM, page 199-207. IEEE, (2019)25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range., , , , , , , , , and 4 other author(s). ISSCC, page 396-398. IEEE, (2020)250mV-950mV 1.1Tbps/W double-affine mapped Sbox based composite-field SMS4 encrypt/decrypt accelerator in 14nm tri-gate CMOS., , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2016)A Ray-Casting Accelerator in 10nm CMOS for Efficient 3D Scene Reconstruction in Edge Robotics and Augmented Reality Applications., , , , , , , , , and 4 other author(s). VLSI Circuits, page 1-2. IEEE, (2020)