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25.7 Time-Borrowing Fast Mux-D Scan Flip-Flop with On-Chip Timing/Power/VMIN Characterization Circuits in 10nm CMOS.

, , , , , , , , , , , , , and . ISSCC, page 392-394. IEEE, (2020)

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Blindsight: Blinding EM Side-Channel Leakage using Built-In Fully Integrated Inductive Voltage Regulator., , , , , , , and . CoRR, (2018)Exploiting on-chip power management for side-channel security., , , , , and . DATE, page 401-406. IEEE, (2018)A 128b AES Engine with Higher Resistance to Power and Electromagnetic Side-Channel Attacks Enabled by a Security-Aware Integrated All-Digital Low-Dropout Regulator., , , , , and . ISSCC, page 404-406. IEEE, (2019)25.7 Time-Borrowing Fast Mux-D Scan Flip-Flop with On-Chip Timing/Power/VMIN Characterization Circuits in 10nm CMOS., , , , , , , , , and 4 other author(s). ISSCC, page 392-394. IEEE, (2020)A 4900×m2 839Mbps Side-Channel Attack Resistant AES-128 in 14nm CMOS with Heterogeneous Sboxes, Linear Masked MixColumns and Dual-Rail Key Addition., , , , , , , , , and 2 other author(s). VLSI Circuits, page 234-. IEEE, (2019)A Microwatt-Class Always-On Sensor Fusion Engine Featuring Ultra-Low-Power AOI Clocked Circuits in 14nm CMOS., , , , , , , , , and 1 other author(s). VLSI Circuits, page 50-. IEEE, (2019)Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunities., , , , , and . ISLPED, page 1-2. IEEE, (2017)8.1 Improved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator., , , , , and . ISSCC, page 142-143. IEEE, (2017)An Inductive Voltage Regulator With Overdrive Tracking Across Input Voltage in Cascoded Power Stage., , , , , , and . IEEE Trans. Circuits Syst., 67-II (12): 3083-3087 (2020)VDPred: Predicting Voltage Droop for Power-Effient 3D Multi-core Processor Design., , , and . ICCAE, page 83-88. IEEE, (2021)