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Disambiguation of "Howard, Jason"

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Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling With Optimal Core Allocation and Thread Hopping for the 80-Core TeraFLOPS Processor.

, , , , , , , , , , , and . IEEE J. Solid State Circuits, 46 (1): 184-193 (2011)

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Ian Jason

Howard Nelson

Howard Foster

Howard Li

Jason Miskuly

 

Other publications of authors with the same name

The First Direct Mesh-to-Mesh Photonic Fabric.. HCS, page 1-17. IEEE, (2023)The First Direct Mesh-to-Mesh Photonic Fabric., , and . IEEE Micro, 44 (3): 25-32 (May 2024)Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling With Optimal Core Allocation and Thread Hopping for the 80-Core TeraFLOPS Processor., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 46 (1): 184-193 (2011)A 4.2GHz 0.3mm2 256kb Dual-Vcc SRAM Building Block in 65nm CMOS., , , , , , , , , and 3 other author(s). ISSCC, page 2572-2581. IEEE, (2006)A 280mV-to-1.2V wide-operating-range IA-32 processor in 32nm CMOS., , , , , , , , , and 11 other author(s). ISSCC, page 66-68. IEEE, (2012)Resiliency for many-core system on a chip., , , , , , and . ASP-DAC, page 388-389. IEEE, (2014)Testing High-Speed IO Links Using On-Die Circuitry., , , and . VLSI Design, page 807-810. IEEE Computer Society, (2006)An IA-32 processor with a wide voltage operating range in 32nm CMOS., , , , , , , , , and 9 other author(s). Hot Chips Symposium, page 1-37. IEEE, (2012)The 48-core SCC Processor: the Programmer's View., , , , , , , , , and 1 other author(s). SC, page 1-11. IEEE, (2010)2GHz 2Mb 2T Gain-Cell Memory Macro with 128GB/s Bandwidth in a 65nm Logic Process., , , , , , , , , and 1 other author(s). ISSCC, page 274-275. IEEE, (2008)