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Exploring Pareto-Optimal Hybrid Main Memory Configurations Using Different Emerging Memories., , , , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (2): 733-746 (февраля 2023)Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAMs., , , , , и . IEEE Trans. Computers, 71 (9): 2219-2233 (2022)Challenges and targets of MRAM-enabled scaled spintronic logic circuits., , , , , , , , , и 1 other автор(ы). CoRR, (2022)Variation-Aware Physics-Based Electromigration Modeling and Experimental Calibration for VLSI Interconnects., , , , , , , и . IRPS, стр. 1-6. IEEE, (2019)The Promise of 2-D Materials for Scaled Digital and Analog Applications., , , , , , , , , и 2 other автор(ы). ISSCC, стр. 394-395. IEEE, (2023)Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM., , , , , , , , , и 7 other автор(ы). VLSI Circuits, стр. 194-. IEEE, (2019)Doped GeSe materials for selector applications., , , , , , , , , и 1 other автор(ы). ESSDERC, стр. 168-171. IEEE, (2017)Device-Aware Test for Back-Hopping Defects in STT-MRAMs., , , , , , , , и . DATE, стр. 1-6. IEEE, (2023)Modeling and spectroscopy of ovonic threshold switching defects., , , , , , и . IRPS, стр. 1-5. IEEE, (2021)MTJ degradation in SOT-MRAM by self-heating-induced diffusion., , , , , , , и . IRPS, стр. 4. IEEE, (2022)