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Disambiguation of "Menolfi, Christian"

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A cryogenic SRAM based arbitrary waveform generator in 14 nm for spin qubit control.

, , , , , , , , , , and . ESSCIRC, page 57-60. IEEE, (2022)

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Christian Ivo Menolfi

Christian Christian

Christian Winter

Gold-katalysierte Cycloisomerisierung funktionalisierter Allene und Anwendung in der Naturstoffsynthese. TU Dortmund, (2009)

Christian Helbig

Synthese und Charakterisierung von metallorganischen Bronzen. Uni Augsburg, (2009)

Christian Schüller

Automatisierte Feedbackgenerierung in der benutzerzentrierten Softwareentwicklung am Beispiel mobiler Anwendungen. TU München, (2009)
 

Other publications of authors with the same name

A 5.7mW/Gb/s 24-to-240Ω 1.6Gb/s thin-oxide DDR transmitter with 1.9-to-7.6V/ns clock-feathering slew-rate control in 22nm CMOS., , , , , , , , and . ISSCC, page 310-311. IEEE, (2013)23.6 A 30Gb/s 0.8pJ/b 14nm FinFET receiver data-path., , , , , , , , , and 1 other author(s). ISSCC, page 408-409. IEEE, (2016)A 24-to-72GS/s 8b time-interleaved SAR ADC with 2.0-to-3.3pJ/conversion and >30dB SNDR at nyquist in 14nm CMOS FinFET., , , , , , , , , and . ISSCC, page 358-360. IEEE, (2018)A 25Gb/s CDR in 90nm CMOS for High-Density Interconnects., , , , , and . ISSCC, page 1266-1275. IEEE, (2006)22.1 A 90GS/s 8b 667mW 64× interleaved SAR ADC in 32nm digital SOI CMOS., , , , , , , , , and . ISSCC, page 378-379. IEEE, (2014)Background calibration using noisy reference ADC for a 12 b 600 MS/s 2 × TI SAR ADC in 14nm CMOS FinFET., , , , , , , , , and 2 other author(s). ESSCIRC, page 183-186. IEEE, (2017)A low-noise CMOS instrumentation amplifier for thermoelectric infrared detectors., and . IEEE J. Solid State Circuits, 32 (7): 968-976 (1997)A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET., , , , , , , , , and 5 other author(s). ISSCC, page 476-478. IEEE, (2019)A 28Gb/s 4-tap FFE/15-tap DFE serial link transceiver in 32nm SOI CMOS technology., , , , , , , , , and 11 other author(s). ISSCC, page 324-326. IEEE, (2012)A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFET., , , , , , , , , and 1 other author(s). ISSCC, page 112-114. IEEE, (2019)