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340 mV-1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS.

, , , , , , , , и . IEEE J. Solid State Circuits, 50 (4): 1048-1058 (2015)

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Eric Hsu

Yüanfang Hsü

Oscar Hsu

Eugene Hsu

Allen Hsu

 

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