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Другие публикации лиц с тем же именем

Novel SRAM bias control circuits for a low power L1 data cache., , , , и . NORCHIP, стр. 1-6. IEEE, (2012)Topic 15+20: Multimedia and Embedded Systems., , , и . Euro-Par, том 2150 из Lecture Notes in Computer Science, стр. 651-652. Springer, (2001)Parallel Computer Architecture., , , и . Euro-Par, том 1900 из Lecture Notes in Computer Science, стр. 537-538. Springer, (2000)Memory Access Synchronization in Vector Multiprocessors., , и . CONPAR, том 854 из Lecture Notes in Computer Science, стр. 414-425. Springer, (1994)Initial Evaluation of Multimedia Extensions on VLIW Architectures., и . SAMOS, том 3133 из Lecture Notes in Computer Science, стр. 403-412. Springer, (2004)Performance and Power Evaluation of Clustered VLIW Processors with Wide Functional Units., , , , и . SAMOS, том 3133 из Lecture Notes in Computer Science, стр. 88-97. Springer, (2004)Speculative early register release., , , и . Conf. Computing Frontiers, стр. 291-302. ACM, (2006)Access to streams in multiprocessor systems., , и . PDP, стр. 310-316. IEEE, (1993)Breaking the bandwidth wall in chip multiprocessors., , , и . ICSAMOS, стр. 255-262. IEEE, (2011)Overlapping communication and computation by using a hybrid MPI/SMPSs approach., , , и . ICS, стр. 5-16. ACM, (2010)