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Disambiguation of "Hoskote, Yatin Vasant"

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Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors.

, , and . ICCD, page 532-537. IEEE Computer Society, (1995)

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Vasant Desai

Vasant Shah

Vasant Kashinath Saosapurkar

 

Other publications of authors with the same name

Automated verification of temporal properties specified as state machines in VHDL., , and . Great Lakes Symposium on VLSI, page 100-105. IEEE Computer Society, (1995)A Reconfigurable On-die Traffic Generator in 45nm CMOS for a 48 iA-32 Core Network-on-Chip., , , , , , , , and . VLSI Design, page 292-297. IEEE Computer Society, (2012)Abstraction of data path registers for multilevel verification of large circuits., , , and . Great Lakes Symposium on VLSI, page 11-14. IEEE, (1994)Verification of Circuits Described in VHDL through Extraction of Design Intent., , , and . VLSI Design, page 417-420. IEEE Computer Society, (1994)A Unified Framework for Design Validation and Manufacturing Test., , and . ITC, page 875-884. IEEE Computer Society, (1996)Coverage Estimation for Symbolic Model Checking., , , and . DAC, page 300-305. ACM Press, (1999)A 2 Tb/s 6 , ˟, 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS., , , , , , , , and . IEEE J. Solid State Circuits, 46 (4): 757-766 (2011)Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking., , , , , , , and . FMCAD, volume 1166 of Lecture Notes in Computer Science, page 19-33. Springer, (1996)A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm., , , , , , and . VLSI Design, page 252-257. IEEE Computer Society, (2010)Verification of transient response of linear analog circuits., , and . VTS, page 42-47. IEEE Computer Society, (1995)