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Disambiguation of "Kassab, Mark"

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A Fast Sequential Learning Technique for Real Circuits with Application to Enhancing ATPG Performance.

, , and . DAC, page 625-631. ACM Press, (1998)

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Randa Kassab

Hisham Kassab

Talaat al- Kassab

Islam Yassin-Kassab

Tala'at Al-Kassab

 

Other publications of authors with the same name

Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects., , , , , , , , , and . ATS, page 139-146. IEEE, (2006)Test Generation for Designs with On-Chip Clock Generators., and . Asian Test Symposium, page 411-417. IEEE Computer Society, (2009)Efficient Prognostication of Pattern Count with Different Input Compression Ratios., , , , , , , and . ETS, page 1-2. IEEE, (2020)Test Compression Improvement with EDT Channel Sharing in SoC Designs., , , , , , , and . NATW, page 22-31. IEEE, (2014)X-Press Compactor for 1000x Reduction of Test Data., , , , , and . ITC, page 1-10. IEEE Computer Society, (2006)Streaming Scan Network (SSN): An Efficient Packetized Data Network for Testing of Complex SoCs., , , , , , , , , and 3 other author(s). ITC, page 1-10. IEEE, (2020)EDT channel bandwidth management in SoC designs with pattern-independent test access mechanism., , , , , , and . ITC, page 1-9. IEEE Computer Society, (2011)Dynamic channel allocation for higher EDT compression in SoC designs., , , , , and . ITC, page 265-274. IEEE Computer Society, (2010)Clock control architecture and ATPG for reducing pattern count in SoC designs with multiple clock domains., , , and . ITC, page 114-123. IEEE Computer Society, (2010)Realizing High Test Quality Goals with Smart Test Resource Usage., , , , , , , and . ITC, page 525-533. IEEE Computer Society, (2004)