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Disambiguation of "Rajski, Janusz"

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A Fast Sequential Learning Technique for Real Circuits with Application to Enhancing ATPG Performance.

, , and . DAC, page 625-631. ACM Press, (1998)

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Janusz Panzer

Janusz Rat

Janusz Gatniejewski

Janusz Surzykiewicz

Janusz Bogdanowicz

 

Other publications of authors with the same name

Self-test methodology for at-speed test of crosstalk in chip interconnects., , and . DAC, page 619-624. ACM, (2000)Embedded deterministic test points for compact cell-aware tests., , , , , , , , , and . ITC, page 1-8. IEEE, (2015)Built-In Self-Test for Systems on Silicon., , and . VLSI Design, page 609-610. IEEE Computer Society, (1999)GEMINI-a logic system for fault diagnosis based on set functions.. FTCS, page 292-297. IEEE Computer Society, (1988)On Using Implied Values in EDT-based Test Compression., , , , and . DAC, page 11:1-11:6. ACM, (2014)Cube-Contained Random Patterns and Their Applications to the Complete Testing of Synthesized Multi-Level Circuits., and . ITC, page 473-482. IEEE Computer Society, (1991)On necessary and nonconflicting assignments in algorithmic test pattern generation., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 13 (4): 515-530 (1994)Hybrid Ring Generators for In-System Test Applications., , , and . ETS, page 1-6. IEEE, (2023)Timing-Aware ATPG for High Quality At-speed Testing of Small Delay Defects., , , , , , , , , and . ATS, page 139-146. IEEE, (2006)DIST: Deterministic In-System Test with X-masking., , , and . ITC, page 20-27. IEEE, (2022)