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Disambiguation of "Badaroglu, Mustafa"

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PPAC scaling enablement for 5nm mobile SoC technology.

, , , , , , , , , , , , , , , , and . ESSDERC, page 240-243. IEEE, (2017)

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Mustafa Mustafa

Mustafa Zaki Mustafa

Mustafa Billur

Mustafa Biyikal

Mustafa Özerler

 

Other publications of authors with the same name

Modeling and experimental verification of substrate noise generation in a 220-Kgates WLAN system-on-chip with multiple supplies., , , , , , , and . IEEE J. Solid State Circuits, 38 (7): 1250-1260 (2003)BANDIT: embedding analog-to-digital converters on digital telecom ASICs., , , , , , , , , and 1 other author(s). ICECS, page 1377-1380. IEEE, (1999)High-level simulation of substrate noise generation from large digital circuits with multiple supplies., , , , , , , and . DATE, page 326-330. IEEE Computer Society, (2001)Scalable Gate-Level Models for Power and Timing Analysis., , , , , and . ISCAS, page 2938-2941. IEEE, (2007)Modeling of Substrate Noise Generation, Isolation, and Impact for an LC-VCO and a Digital Modem on a Lightly-Doped Substrate., , , , , , and . IEEE J. Solid State Circuits, 41 (9): 2040-2051 (2006)System-Level Simulation of Electromigration in a 3 nm CMOS Power Delivery Network: The Effect of Grid Redundancy, Metallization Stack and Standard-Cell Currents., , , , and . IRPS, page 1-7. IEEE, (2022)Impact of technology scaling on substrate noise generation mechanisms mixed signal ICs., , , , , and . CICC, page 501-504. IEEE, (2004)Interconnect-Aware Technology and Design Co-Optimization for the 5-nm Technology and Beyond.. J. Low Power Electron., 14 (2): 186-194 (2018)Outlook of device and assembly technologies enabling high-performance mobile computing: IRDS view (invited).. SLIP, page 1. ACM, (2020)A Novel System-Level Physics-Based Electromigration Modelling Framework: Application to the Power Delivery Network., , , , and . SLIP, page 1-7. IEEE, (2021)