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Disambiguation of "Schmidt, Colin"

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A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI.

, , , , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (12): 2721-2725 (2020)

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Colin Markus Schmidt

Maité Colin

Samuel Colin

Hansjoachim Colin

Carmen Colinas Schwarz

 

Other publications of authors with the same name

Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations., , , , , , , , , and 1 other author(s). ICCAD, page 209-216. IEEE, (2017)Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC., , , , , , , , , and 4 other author(s). ESSCIRC, page 269-272. IEEE, (2016)4.3 An Eight-Core 1.44GHz RISC-V Vector Machine in 16nm FinFET., , , , , , , , , and 2 other author(s). ISSCC, page 58-60. IEEE, (2021)An Eight-Core 1.44-GHz RISC-V Vector Processor in 16-nm FinFET., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 57 (1): 140-152 (2022)A 16mm2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET., , , , , , , , , and 9 other author(s). ESSCIRC, page 259-262. IEEE, (2021)FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud., , , , , , , , , and 6 other author(s). ISCA, page 29-42. IEEE Computer Society, (2018)A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 52 (7): 1863-1875 (2017)Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs., , , , , , , , , and 7 other author(s). IEEE Micro, 40 (4): 10-21 (2020)FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud., , , , , , , , , and 6 other author(s). IEEE Micro, 39 (3): 56-65 (2019)A Methodology for Reusable Physical Design., , , , , , and . ISQED, page 243-249. IEEE, (2020)