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Disambiguation of "Mulaosmanovic, Halid"

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Charge trapping challenges of CMOS embedded complementary FeFETs.

, , , , , , , , , and . IMW, page 1-4. IEEE, (2024)

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Halid Ünal

Aissa Halidou

Halid Ünal

Halid Ünal

Halid Hrasnica

 

Other publications of authors with the same name

Multi-Level Operation of Ferroelectric FET Memory Arrays for Compute-In-Memory Applications., , , , , , , , , and 3 other author(s). IMW, page 1-4. IEEE, (2023)Reliability Assesement of Ferroelectric nvCAP for Small-Signal Capacitive Read-Out., , , , and . IRPS, page 1-5. IEEE, (2024)Ultra-dense co-integration of FeFETs and CMOS logic enabling very-fine grained Logic-in-Memory., , , , , , , , and . ESSDERC, page 118-121. IEEE, (2019)Characterization and modeling of innovative solid-state memory technologies.. Polytechnic University of Milan, Italy, (2016)Prospects for energy-efficient edge computing with integrated HfO2-based ferroelectric devices., , , , , , , , , and 2 other author(s). VLSI-SoC, page 180-183. IEEE, (2018)Computing with ferroelectric FETs: Devices, models, systems, and applications., , , , , , , , , and 9 other author(s). DATE, page 1289-1298. IEEE, (2018)Demonstration of versatile nonvolatile logic gates in 28nm HKMG FeFET technology., , , and . ISCAS, page 1-5. IEEE, (2018)Reliability aspects of ferroelectric hafnium oxide for application in non-volatile memories., , , , , and . IRPS, page 1-6. IEEE, (2021)Flexible Memory, Bit-Passing and Mixed Logic/Memory Operation of two Intercoupled FeFET Arrays., , , and . ISCAS, page 1-5. IEEE, (2020)Impact of field cycling on HfO2 based non-volatile memory devices., , , , , , , , , and 10 other author(s). ESSDERC, page 364-368. IEEE, (2016)