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Disambiguation of "Lacaita, Andrea L."

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Cycling-induced threshold-voltage instabilities in nanoscale NAND flash memories: Sensitivity to the array background pattern.

, , , , , , and . ESSDERC, page 54-57. IEEE, (2014)

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L Solymosi

L Bräuer

L Müller

L Eberl

L Ruess

 

Other publications of authors with the same name

Random Dopant Fluctuation and Random Telegraph Noise in Nanowire and Macaroni MOSFETs., , and . ESSDERC, page 230-233. IEEE, (2018)Differential tuning oscillators with reduced flicker noise upconversion., , , , and . ICECS, page 33-36. IEEE, (2004)A multi-tank LC-oscillator microwave oscillator example., , , , and . ICECS, page 29-32. IEEE, (2004)A simulation and modeling environment for the analysis and design of charge redistribution DACs used in SAR ADCs., , , and . MIPRO, page 74-79. IEEE, (2014)Analysis and Design of 8-to-101.6-GHz Injection-Locked Frequency Divider by Five With Concurrent Dual-Path Multi-Injection Topology., , , , and . IEEE J. Solid State Circuits, 57 (6): 1788-1799 (2022)21.1 A 1.7GHz MDLL-based fractional-N frequency synthesizer with 1.4ps RMS integrated jitter and 3mW power using a 1b TDC., , , , , and . ISSCC, page 360-361. IEEE, (2014)Automatic amplitude control loop for a 2-V, 2.5-GHz LC-tank VCO., , , , and . CICC, page 209-212. IEEE, (2001)A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS., , , , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)A 76.7fs-lntegrated-Jitter and -71.9dBc In-Band Fractional-Spur Bang-Bang Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering., , , , , , , , , and 1 other author(s). ISSCC, page 78-79. IEEE, (2023)A tool for the assisted design of charge redistribution SAR ADCs., , , and . DATE, page 1265-1268. ACM, (2015)