( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
New layout design methodology for monolithically integrated 3D CMOS logic circuits based on parasitics engineering.

, , и . ESSDERC, стр. 258-261. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Masumi Shimizu

Masumi Kersken

Masumi Morita

 

Другие публикации лиц с тем же именем

Comprehensive Analysis of Hole-Trapping in SiN Films with a Wide Range of Time Constants Based on Dynamic C-V., , , , , и . IRPS, стр. 1-7. IEEE, (2023)Emerging Non-Volatile Memory and Thin-Film Transistor Technologies for Future 3D-LSI., , , , , , , , и . ESSDERC, стр. 138-141. IEEE, (2018)Emerging nanoscale silicon devices taking advantage of nanostructure physics., , и . IBM J. Res. Dev., 50 (4-5): 411-418 (2006)Hot carrier degradation, TDDB, and 1/f noise in Poly-Si Tri-gate nanowire transistor., , и . IRPS, стр. 5. IEEE, (2018)A Vertical Channel-All-Around FeFET with Thermally Stable Oxide Semiconductor Achieving High ΔIon> 2µA/cell for 3D Stackable 4F2 High Speed Memory., , , , , и . VLSI Technology and Circuits, стр. 1-2. IEEE, (2024)Impact of specific failure mechanisms on endurance improvement for HfO2-based ferroelectric tunnel junction memory., , , , , , , , и . IRPS, стр. 6. IEEE, (2018)Ag Ionic Memory Cell Technology for Terabit-Scale High-DensityApplication., , , , , , , , , и . VLSI Circuits, стр. 188-. IEEE, (2019)New layout design methodology for monolithically integrated 3D CMOS logic circuits based on parasitics engineering., , и . ESSDERC, стр. 258-261. IEEE, (2015)Novel Operation Scheme for Suppressing Disturb in HfO2-based FeFET Considering Charge- Trapping-Coupled Polarization Dynamics., , , , , , , , , и 1 other автор(ы). IRPS, стр. 1-5. IEEE, (2023)Breakdown Lifetime Analysis of HfO2-based Ferroelectric Tunnel Junction (FTJ) Memory for In-Memory Reinforcement Learning., , , и . IRPS, стр. 1-6. IEEE, (2020)