( en | de | ru )

 

Disambiguation of "Huang, Shanshi"

Author of the publication

copydeleteadd this publication to your clipboard
XOR-CIM: Compute-In-Memory SRAM Architecture with Embedded XOR Encryption.

, , , , and . ICCAD, page 77:1-77:6. IEEE, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Josef Huang

Pa Huang

Zheng Huang

Yuejun Huang

Shiwei Huang

 

Other publications of authors with the same name

DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training., , , , and . CoRR, (2020)DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (11): 2306-2319 (2021)Mitigating Adversarial Attack for Compute-in-Memory Accelerator Utilizing On-chip Finetune., , and . NVMSA, page 1-6. IEEE, (2021)A Two-way SRAM Array based Accelerator for Deep Neural Network On-chip Training., , , , , , , , , and . DAC, page 1-6. IEEE, (2020)Compute-in-Memory with Emerging Nonvolatile-Memories: Challenges and Prospects., , , and . CICC, page 1-4. IEEE, (2020)A Runtime Reconfigurable Design of Compute-in-Memory-Based Hardware Accelerator for Deep Learning Inference., , , , and . ACM Trans. Design Autom. Electr. Syst., 26 (6): 45:1-45:18 (2021)A Runtime Reconfigurable Design of Compute-in-Memory based Hardware Accelerator., , , , and . DATE, page 932-937. IEEE, (2021)XOR-CIM: Compute-In-Memory SRAM Architecture with Embedded XOR Encryption., , , , and . ICCAD, page 77:1-77:6. IEEE, (2020)A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro with Pulse-Width Modulation between Sub-arrays., , , and . VLSI Technology and Circuits, page 266-267. IEEE, (2022)Overcoming Challenges for Achieving High in-situ Training Accuracy with Emerging Memories., , , , and . DATE, page 1025-1030. IEEE, (2020)