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A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.

W. Chen, K. Li, W. Lin, K. Hsu, P. Li, C. Yang, C. Xue, E. Yang, Y. Chen, Y. Chang, T. Hsu, Y. King, C. Lin, R. Liu, C. Hsieh, K. Tang, and M. Chang. ISSCC, page 494-496. IEEE, (2018)

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Jung-Hsing Lin

Peh-jung Lin

Bei-Jung Lin

Lin Lin

Other publications of authors with the same name

A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors.C. Xue, W. Chen, J. Liu, J. Li, W. Lin, W. Lin, J. Wang, W. Wei, T. Chang, T. Chang and 12 other author(s). ISSCC, page 388-390. IEEE, (2019)A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.W. Chen, K. Li, W. Lin, K. Hsu, P. Li, C. Yang, C. Xue, E. Yang, Y. Chen, Y. Chang and 7 other author(s). ISSCC, page 494-496. IEEE, (2018)19.4 embedded 1Mb ReRAM in 28nm CMOS with 0.27-to-1V read using swing-sample-and-couple sense amplifier and self-boost-write-termination scheme.M. Chang, J. Wu, T. Chien, Y. Liu, T. Yang, W. Shen, Y. King, C. Lin, K. Lin, Y. Chih and 2 other author(s). ISSCC, page 332-333. IEEE, (2014)An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory.M. Chang, S. Shen, C. Liu, C. Wu, Y. Lin, Y. King, C. Lin, H. Liao, Y. Chih, and H. Yamauchi. IEEE J. Solid State Circuits, 48 (3): 864-877 (2013)A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time.M. Chang, C. Wu, C. Kuo, S. Shen, K. Lin, S. Yang, Y. King, C. Lin, and Y. Chih. ISSCC, page 434-436. IEEE, (2012)An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory.M. Chang, S. Shen, C. Liu, C. Wu, Y. Lin, S. Wu, C. Huang, H. Lai, Y. King, C. Lin and 3 other author(s). ISSCC, page 206-208. IEEE, (2011)

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Disambiguation of "Lin, Chorng-Jung"

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A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.

Please choose a person to relate this publication to

Jung-Hsing Lin

Peh-jung Lin

Bei-Jung Lin

Lin Lin

Lin Lin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lin, Chorng-Jung"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.

Please choose a person to relate this publication to

Jung-Hsing Lin

Peh-jung Lin

Bei-Jung Lin

Lin Lin

Lin Lin

Other publications of authors with the same name

Disambiguation

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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors.