From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

EdgeBERT: Sentence-Level Energy Optimizations for Latency-Aware Multi-Task NLP Inference., , , , , , , , , и 1 other автор(ы). MICRO, стр. 830-844. ACM, (2021)9.8 A 25mm2 SoC for IoT Devices with 18ms Noise-Robust Speech-to-Text Latency via Bayesian Speech Denoising and Attention-Based Sequence-to-Sequence DNN Speech Recognition in 16nm FinFET., , , , , , , , , и . ISSCC, стр. 158-160. IEEE, (2021)SM6: A 16nm System-on-Chip for Accurate and Noise-Robust Attention-Based NLP Applications : The 33rd Hot Chips Symposium - August 22-24, 2021., , , , , , , , , и . HCS, стр. 1-13. IEEE, (2021)Mapping Asbestos-Cement Corrugated Roofing Tiles with Imagery Cube via Machine Learning in Taiwan., , , , , и . Remote. Sens., 14 (14): 3418 (2022)EdgeBERT: Optimizing On-Chip Inference for Multi-Task NLP., , , , , , , , и . CoRR, (2020)14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration., , , , , , , , , и 19 other автор(ы). ISSCC, стр. 262-264. IEEE, (2024)Algorithm-Hardware Co-Design of Adaptive Floating-Point Encodings for Resilient Deep Learning Inference., , , , , , , и . DAC, стр. 1-6. IEEE, (2020)A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors., , , , , , , , , и 7 other автор(ы). ISSCC, стр. 494-496. IEEE, (2018)Trireme: Exploring Hierarchical Multi-Level Parallelism for Domain Specific Hardware Acceleration., , , , , , , , , и 2 other автор(ы). CoRR, (2022)Trireme: Exploration of Hierarchical Multi-level Parallelism for Hardware Acceleration., , , , , , , , , и 2 other автор(ы). ACM Trans. Embed. Comput. Syst., 22 (3): 53:1-53:23 (2023)