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Disambiguation of "Mishchenko, Alan"

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Exact and Heuristic Minimization of the Average Path Length in Decision Diagrams.

, , , and . J. Multiple Valued Log. Soft Comput., 11 (5-6): 437-465 (2005)

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Oleksiy Mishchenko

Safwat Alani

Maia Alandjiyska

Yilmaz Alan

Bertold Aland

 

Other publications of authors with the same name

m-Inductive Property of Sequential Circuits., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (6): 919-930 (2016)A theory of nondeterministic networks., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (6): 977-999 (2006)Improvements to Technology Mapping for LUT-Based FPGAs., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (2): 240-253 (2007)Effective Logic Synthesis for Threshold Logic Circuit Design., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (5): 926-937 (2019)Fast computation of symmetries in Boolean functions.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (11): 1588-1593 (2003)Incremental ATPG methods for multiple faults under multiple fault models., , , and . ISQED, page 177-180. IEEE, (2015)A Boolean Paradigm in Multi-Valued Logic Synthesis., and . IWLS, page 173-177. (2002)On-the-fly and DAG-aware: Rewriting Boolean Networks with Exact Synthesis., , , , and . DATE, page 1649-1654. IEEE, (2019)Three-Input Gates for Logic Synthesis., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (10): 2184-2188 (2021)Rewriting Environment for Arithmetic Circuit Verification., , , , and . LPAR, volume 57 of EPiC Series in Computing, page 656-666. EasyChair, (2018)