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On the Development of Totally Self-checking Hardware Design for the SHA-1 Hash Function.

, , , , and . SECRYPT, page 270-275. SciTePress, (2012)

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Designs and comparisons of authentication modules for IPSec in configurable and extensible embedded processor., , , and . ICECS, page 243-246. IEEE, (2010)Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs., , , , , and . Journal of Circuits, Systems, and Computers, 25 (4): 1650032:1-1650032:26 (2016)On the Development of Totally Self-checking Hardware Design for the SHA-1 Hash Function., , , , and . SECRYPT, page 270-275. SciTePress, (2012)A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization., , , , , and . IEEE Trans. Signal Process., 59 (12): 6217-6226 (2011)A template-based methodology for efficient microprocessor and FPGA accelerator co-design., , , , and . ICSAMOS, page 15-22. IEEE, (2012)Green footprint of Cognitive Management Technologies for Future Networks., , , and . MIPRO, page 645-649. IEEE, (2011)Cooperative management of wireless mesh networks.. Wireless Days, page 1-6. IEEE, (2012)Green Traffic Engineering for future core networks., and . SoftCOM, page 1-4. IEEE, (2012)A Wireless Sensor Network Testbed for Event Detection in Smart Homes., , and . DCOSS, page 321-322. IEEE Computer Society, (2013)High-performance FPGA implementations of the cryptographic hash function JH., , , and . IET Comput. Digit. Tech., 7 (1): 29-40 (2013)