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Disambiguation of "Callegaro, Vinicius"

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NSP kernel finder - A methodology to find and to build non-series-parallel transistor arrangements.

, , , , , and . SBCCI, page 1-6. IEEE, (2012)

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Vinícius Liebel

Vinícius Maran

Vinicius Malatesta

Vinicius Mariano Carvalho

Vinicius Kannen Cardoso

 

Other publications of authors with the same name

Area impact analysis of via-configurable regular fabric for digital integrated circuit design., , , , , and . SBCCI, page 103-108. ACM, (2011)SwitchCraft: a framework for transistor network design., , , , , and . SBCCI, page 49-53. ACM, (2010)Graph-Based Transistor Network Generation Method for Supergate Design., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (2): 692-705 (2016)Transistor-level optimization of CMOS complex gates., , , , , and . LASCAS, page 1-4. IEEE, (2013)Improving the methodology to build non-series-parallel transistor arrangements., , , , , and . SBCCI, page 1-6. IEEE, (2013)Efficient method to compute minimum decision chains of Boolean functions., , , and . ACM Great Lakes Symposium on VLSI, page 419-422. ACM, (2011)Read-polarity-once Boolean functions., , , and . SBCCI, page 1-6. IEEE, (2013)SOP based logic synthesis for memristive IMPLY stateful logic., , , and . ICCD, page 228-235. IEEE Computer Society, (2015)Four-Level Forms for Memristive Material Implication Logic., , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (5): 1228-1232 (2019)Improved logic synthesis for memristive stateful logic using multi-memristor implication., , , , and . ISCAS, page 181-184. IEEE, (2015)